MODULE 5 · SYLLABUS 5.3 · LEVEL 1

Chapter 3: Data Conversion

Analogue and digital data, and the converters between them: sampling, resolution and quantisation, the flash, successive-approximation, ramp and dual-slope ADCs, binary-weighted and R-2R ladder DACs, their inputs, outputs and limitations, and where aircraft use them.

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🎯 What you'll learn
  • Analogue data and digital data — and why aircraft convert between them
  • How an ADC samples, quantises and encodes: resolution, step size, quantisation error, Nyquist
  • ADC types: flash, successive approximation, ramp (counter) and dual-slope — speed versus accuracy
  • DAC types: binary-weighted and R-2R ladder, staircase output and smoothing
  • Converter inputs, outputs and limitations
  • Aircraft applications: air data, FADEC, flight data acquisition, synchro converters
📖 The lesson

Analogue data and digital data

Analogue data varies continuously and can take any value within its range: the voltage from a pressure transducer, the AC output of a tachometer generator, a thermocouple's millivolts, the position of a potentiometer, a synchro's three wires or an LVDT. Digital data takes only discrete values, coded as binary words — a pulse train on a data bus, or a discrete that is simply 28 V or open.

  • Digital data has big advantages: it can be stored, processed by computers and multiplexed onto one data bus; it is immune to noise as long as a 1 can still be told from a 0; and its accuracy does not degrade with cable length, temperature or the number of receivers. Accuracy is set by the number of bits, not by the quality of the wiring.
  • But the physical world is analogue. Sensors measure analogue quantities, and many indicators, servo motors and audio outputs need analogue drive. Converters join the two worlds.
Sensor pressure, temp Conditioning amplify, filter Sample & hold ADC quantise, encode Computer process, bus DAC code → voltage Filter / amp smooth Output indicator, servo analogue digital (binary words) analogue A typical conversion chain
Where converters sit. Sensors are analogue, computers and data buses are digital, and many indicators and actuators are analogue again. An ADC converts on the way in, a DAC on the way out. An anti-aliasing filter and a sample-and-hold usually come before the ADC; a smoothing filter after the DAC.

An analogue-to-digital converter (ADC) turns an analogue voltage or current into a binary number. A digital-to-analogue converter (DAC) turns a binary number back into a voltage or current proportional to it.

How an ADC works

time level 000 001 010 011 100 101 110 111 1 Sample measure the input at regular intervals 2 Quantise round to the nearest of 2ⁿ levels 3 Encode output the level as a binary word 3 bits → 8 levels (000–111) step (1 LSB) = full scale ÷ 2ⁿ error ≤ ±½ LSB sample at > 2 × highest frequency — analogue input — digitised (held) value ● sample
Analogue to digital. The converter samples the continuous signal at regular intervals, quantises each sample to the nearest of 2ⁿ levels, and encodes that level as an n-bit word. More bits mean smaller steps; faster sampling follows faster changes. The difference between the true value and the step is the quantisation error.
  • Sampling: the input is measured at regular intervals. A sample-and-hold circuit captures the input and holds it steady while the conversion takes place.
  • Sampling rate and Nyquist: to represent a signal faithfully, it must be sampled at more than twice its highest frequency (the Nyquist criterion). Sampling too slowly causes aliasing — the samples describe a false, lower frequency. An anti-aliasing low-pass filter before the ADC removes frequencies the converter cannot follow.
  • Quantisation: the sample is rounded to the nearest of the converter's 2n levels, where n is the number of bits.
  • Resolution: the smallest change the converter can show — one step, or 1 LSB = full-scale range ÷ 2n. An 8-bit converter resolves 1 part in 256 (about 0.4%); on a 10 V range that is about 39 mV per step. A 12-bit converter resolves 1 part in 4 096 (about 2.4 mV on 10 V).
  • Quantisation error: the rounding error, at most ±½ LSB. It is reduced only by using more bits.
  • Encoding: the level is output as a binary word — in parallel (one wire per bit) or serially — in straight binary, two's complement for bipolar inputs, or BCD for displays.
  • Conversion time: how long one conversion takes. It limits the maximum sampling rate.

Types of ADC

Every ADC compares the input with a known reference using one or more comparators — circuits whose output switches to 1 when one input is higher than the other. The types differ in how many comparisons they make and how.

+Vref Vin − + 0 − + 0 − + 0 − + 1 − + 1 − + 1 − + 1 Priority encoder D2 = 1 D1 = 0 D0 = 0 thermometer code 0001111 → 100 3-bit flash ADC 2ⁿ − 1 comparators (here 7) each compares Vin with one tap of the reference divider all compare at the same time → the fastest converter 8 bits would need 255 comparators — costly, power-hungry
Flash (parallel) ADC. A resistor divider sets a reference voltage for each comparator. Every comparator whose reference is below Vin outputs 1, giving a 'thermometer' pattern that a priority encoder turns into binary — all in one step. It is the fastest type, but the number of comparators doubles with every extra bit.
  • Flash (parallel): 2n − 1 comparators, each with its own reference from a resistor divider, all working at once. The fastest type, but the comparator count doubles with every bit (255 for 8 bits), so it is costly, power-hungry and limited to low resolution. Used for very fast signals such as radar and video.
Successive-approximation ADC Vin Sample & hold − + comparator SAR register + control logic DAC internal, n-bit trial code trial voltage clock n-bit output 4-bit example: Vin = 11 steps of 16 step try DAC keep? result 1 1000 8 8 ≤ 11 ✓ 1000 2 1100 12 12 > 11 ✗ 1000 3 1010 10 10 ≤ 11 ✓ 1010 4 1011 11 11 ≤ 11 ✓ 1011 MSB first, one bit per clock pulse: n bits → n comparisons, fixed time result 1011₂ = 11
Successive approximation. The register tries each bit in turn, starting with the MSB. An internal DAC turns the trial code into a voltage; if it is not above Vin the bit is kept, otherwise it is cleared. An n-bit conversion takes exactly n steps — a good balance of speed, resolution and cost, so it is the most common general-purpose ADC.
  • Successive approximation (SAR): a binary search, one bit per clock pulse, MSB first, using an internal DAC and one comparator. Conversion takes n clock cycles regardless of the input. The most common general-purpose ADC.
  • Ramp, counter or staircase: a counter drives a DAC upwards from zero until its output passes Vin, then the count is read. Simple and cheap, but slow, and the conversion time varies with the input (up to 2n clocks). A tracking version counts up or down to follow the input.
  • Dual-slope (integrating): a capacitor is charged by Vin for a fixed time, then discharged by a reference while a counter measures how long it takes. The count is proportional to the average input. Slow but very accurate, and it rejects noise and mains hum, so it is used in digital multimeters.
  • Sigma-delta: a very fast 1-bit converter plus digital filtering, giving high resolution at moderate speed — used for audio and precision sensors.
Converter How it works Speed Typical use Note Flash (parallel) 2ⁿ − 1 comparators at once fastest radar, video costly, low resolution Successive approx. binary search, 1 bit / clock fast general purpose most common Ramp / counter count up until DAC = Vin slow, varies simple, cheap up to 2ⁿ clocks Dual-slope integrate Vin, then de-integrate slowest multimeters very accurate, rejects noise Sigma-delta 1-bit, very fast oversampling medium audio, sensors high resolution
ADC types compared. There is always a trade-off between speed, resolution, accuracy and cost. Flash is fastest; dual-slope is slowest but most accurate and best at rejecting noise; successive approximation sits in the middle and is used most.

Digital-to-analogue converters

A DAC adds together currents or voltages weighted by each bit, so that the output is proportional to the binary input: Vout = Vref × (code ÷ 2n).

  • Binary-weighted resistor DAC: each bit switches a resistor into an op-amp summing amplifier, with values R, 2R, 4R, 8R… so each bit contributes half as much as the one before. Simple, but for many bits it needs a very wide range of very precise resistors, which is hard to make — so it is used only for a few bits.
  • R-2R ladder DAC: uses only two resistor values, R and 2R, repeated for every bit. It is easy to make accurately on a chip and is the most common DAC.
4-bit R-2R ladder DAC (input 1011) 2R R R R 2R D0 = 1 2R D1 = 1 2R D2 = 0 2R D3 = 1 +Vref 0 V LSB MSB − + Vout buffer (voltage follower) Vout = Vref × code ÷ 16 1011 = 11 → 11/16 Vref only two resistor values, easy to make accurately
R-2R ladder DAC. Each bit switches the bottom of its 2R resistor to the reference voltage (1) or to 0 V (0). The ladder halves the effect of each bit as it moves away from the output, so the MSB contributes ½ Vref, the next ¼, and so on. A buffer amplifier presents the result. Only two resistor values are needed, which is why this is the most common DAC.
  • The DAC output is a staircase, one step per code. A low-pass (smoothing) filter after it removes the steps when a smooth signal such as audio is needed.
  • Resolution: one step = Vref ÷ 2n. Settling time: how long the output takes to settle within ±½ LSB of its new value after the code changes. A DAC is monotonic if its output never falls when the input code rises.
  • Errors include offset (output not zero for code 0), gain (wrong full-scale value), non-linearity, and short glitches when many bits change at once (for example 0111 → 1000).

Inputs, outputs and limitations

ADCDAC
InputAnalogue voltage or current within a set range — unipolar (for example 0–10 V) or bipolar (±10 V); a reference voltage; a clock and a start-conversion signalBinary word (parallel or serial), a reference voltage, a load/latch signal
OutputBinary word, plus an end-of-conversion (data-ready) signalAnalogue voltage or current proportional to the code
LimitationsResolution and quantisation error; conversion time and maximum sampling rate; aliasing; input over-range (the output saturates at all 1s); offset, gain and linearity errors; temperature drift; noiseResolution; settling time; glitches; offset, gain and linearity errors; monotonicity; reference accuracy and drift
The trade-off to remember

More bits give finer resolution but cost conversion time, price and power. Faster converters (flash) have fewer bits; the most accurate (dual-slope) are the slowest.

Aircraft applications

  • Air data computers: pressure transducers produce analogue signals that are digitised, corrected and sent as altitude, airspeed and Mach on ARINC 429 or other buses.
  • FADEC / EEC: thermocouple, pressure, speed and position inputs are digitised for the engine control computer; its outputs drive torque motors through DACs and drivers.
  • Flight data acquisition: the (D)FDAU converts analogue parameters, synchros and discretes into digital data for the flight data recorder and quick-access recorder.
  • Synchro-to-digital and resolver-to-digital converters read older synchro transmitters into digital systems; digital-to-synchro converters drive legacy electromechanical indicators from digital data.
  • Audio and video: the cockpit voice recorder, digital audio management systems and cabin entertainment digitise sound and pictures.
  • Fuel quantity, hydraulic pressure and many other sensors feed data concentrators (for example Airbus SDACs) that digitise them for the displays.
Maintenance view

Converters live inside LRUs, so they are not adjusted on the aircraft. But their analogue inputs are sensitive: a poor sensor ground, a damaged shield or a high-resistance connector pin can show up as an offset or noisy reading in an otherwise healthy digital system.

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